Faculty

J.Adline Vidhya

 javece@tce.edu

10

PUBLICATIONS       

27

SEMINAR, CONFERENCE, WORKSHOP ATTENDED

 Educational Qualification

DEGREE BRANCH INSTITUTE YEAR
B.E Electronics and Communication Engineering Vickram College of Engineering 2010
M.E VLSI Design Sethu Institute Of Technology 2012
Ph.D Electronics and Communication Engineering Thiagarajar College of Engineering,Madurai 0

 Experience

PERIOD NO OF YEARS DESIGNATION INSTITUTION
11-07-2012 to 17-07-2018 6 Assistant Professor Vickram College of Engineering
01-09-2021 to 30-06-2023 1.10 Assistant Professor Vickram College of Engineering
01-02-2024 to 14-06-2026 2.4 Thiagarajar Research Fellow Thiagarajar College of Engineering
15-06-2026 to Till date Assistant Professor Thiagarajar College of Engineering

 Publications

 Journals
  1. Jeyamani Adline Vidhya, Vepadappu Raman Venkatasubramani, Sivasubramanian Rajaram, Vivekanandan Vinoth Thyagarajan, Efficient finite field inversion using parallel Hex-ITA framework on FPGA, IEICE Electronics Express, 2026, Volume 23, Issue 7, Pages 20260007, Released on J-STAGE April 10, 2026, Advance online publication February 13, 2026, Online ISSN 1349-2543, https://doi.org/10.1587/elex.23.20260007
  2. Adline Vidhya, V. R. Venkatasubramani, "Parallel Processor Design for Binary Edwards and Huff Curves on FPGA with Latency Optimization," Journal of Propulsion Technology, vol. 46, no. 3, 2025.
  3. J. Adline Vidhya, V. Karthik, K. Monisha, and B. Muthupandian, "Data Encoding Techniques for Low Power Address and Data Buses," International Journal of Advanced Information Science and Technology (IJAIST), vol. 4, no. 6, pp. 9–15,
  4. J. Adline Vidhya, "FPGA Implementation of an ECG Signal using GSM Network," CiiT International Journal of Programmable Device Circuits and Systems, vol. 6, 2014.
 Conferences
  1. Adline Vidhya, J., Venkatasubramani, V.R., Rajaram, S., Vinoth Thyagarajan, V. (2026). Fast Modular Inversion in GF(2m) on FPGA Using Optimized Exponentiation. In: Kaiser, M.S., Xie, J., Joshi, A. (eds) Intelligent Strategies for ICT. ICTCS 2025. Lecture Notes in Networks and Systems, vol 1894. Springer, Cham. https://doi.org/10.1007/978-3-032-20603-9_48
  2. J. A. Vidhya, V. R. Venkatasubramani, S. Rajaram, V. V. Thyagarajan and M. S. K. Manikandan, "An FPGA-Optimized Parallel Processor Architecture for Huff Curves with Reduced Clock Cycles," 2025 IEEE International Conference on Interdisciplinary Approaches in Technology and Management for Social Innovation (IATMSI), Gwalior, India, 2025, pp. 1-6, doi: 10.1109/IATMSI64286.2025.10984778.
  3. Adline Vidhya, J., Venkatasubramani, V.R., Rajaram, S., Vinoth Thyagarajan, V., Manikandan, M.S.K. (2025). Low Latency Binary Edward Curve Crypto Processor for FPGA Platforms. In: Shankar Sriram, V., H., A.G., Li, G., Pokhrel, S.R. (eds) Applications and Techniques in Information Security. ATIS 2024. Communications in Computer and Information Science, vol 2306. Springer, Singapore. https://doi.org/10.1007/978-981-97-9743-1_8
  4. J. A. Vidhya and S. Rajkumar, "Reconfigurable MIMO OFDM physical layer using single FFT multiplexing," 2012 International Conference on Computing, Communication and Applications, Dindigul, India, 2012, pp. 1-5, doi: 10.1109/ICCCA.2012.6179173.
 Books
  1. J. Adline Vidhya, V. R. Venkatasubramani, S. Rajaram, and V. Vinoth Thyagarajan, "Fast Modular Inversion in GF(2^m) on FPGA Using Optimized Exponentiation," in Intelligent Strategies for ICT, M. S. Kaiser, J. Xie, and A. Joshi, Eds., Lecture Notes in Networks and Systems, vol. 1894. Cham, Switzerland: Springer, 2026, pp. 503–513. doi: 10.1007/978-3-032-20603-9_48
  2. Adline Vidhya, J., Venkatasubramani, V.R., Rajaram, S., Vinoth Thyagarajan, V., Manikandan, M.S.K. (2025). Low Latency Binary Edward Curve Crypto Processor for FPGA Platforms. In: Shankar Sriram, V., H., A.G., Li, G., Pokhrel, S.R. (eds) Applications and Techniques in Information Security. ATIS 2024. Communications in Computer and Information Science, vol 2306. Springer, Singapore. https://doi.org

 Seminar, Conference, Workshop Attended

  1. Participated in 7 days faculty development program on "Digital health and Telemedicine for Allied health Science Faculty" organized by Hindusthan College of Health science, 06-07-2026 to 12-07-2026
  2. Presented a paper titled “High Performance Scalar Multiplication for Binary Edwards Curve with Side Channel Protection” at the Second National Research Conclave, Thiagarajar College of Engineering, Madurai, 26-03-2026 to 27-03-2026
  3. Participated in the “International Conference Talk Series” organized by the Centre for International Affairs (CFIA), Thiagarajar College of Engineering, Madurai, February 23–27, 2026., 23-02-2026 to 27-02-2026
  4. Presented a paper titled “Fast Modular Inversion in GF(2^m) on FPGA using Optimized Exponentiation” at the International Conference on Trends in Communication Systems (ICTCS 2025), Jaipur, India., 15-12-2025 to 17-12-2025
  5. Completed the One Week Online Short-Term Training Programme (STTP) on “Next Generation Tools and Techniques”, at Thiagarajar College of Engineering, Madurai., 24-11-2025 to 28-11-2025
  6. Completed the One Week Online Faculty Development Programme (FDP) on “Chip to Care: Unlocking AI-Driven VLSI for Smart Healthcare Devices” at Thiagarajar College of Engineering, Madurai., 02-06-2025 to 06-06-2025
  7. Presented a paper titled “Efficient FPGA Based Modular Inversion over GF(2^m) Using Optimized x^(16^n )Units” at the National Research Conclave, Thiagarajar College of Engineering, Madurai., 16-05-2025 to 17-05-2025
  8. Presented a paper titled “An FPGA Optimized Parallel Processor Architecture for Huff Curves with Reduced Clock Cycles” at the IEEE International Conference on Interdisciplinary Approaches in Technology and Management for Social Innovation (IATMSI 2025), ABV-IIITM Gwalior, India., 06-03-2025 to 08-03-2025
  9. Presented a paper titled “Low Latency Binary Edwards Curve Cryptoprocessor on FPGA Platforms” at the International Conference on Applications and Techniques in Information Security (ATIS 2024), SASTRA University, Thanjavur., 22-11-2024 to 24-11-2024
  10. Presented a paper titled “An On-Chip AHB Tracer Design using Matrix-Based Lossless Compression Techniques” at ICDASDC 2012, KLN College of Information Technology, Madurai,, 18-11-2024 to 30-11-2024
  11. Participated in the Seminar on “PQLeaks: Practical Side-Channel and Fault Attacks on Post-Quantum Lattice-based Cryptography” delivered by Prof. Shivam Bhasin, Thiagarajar College of Engineering., 25-04-2024 to 25-04-2024
  12. Participated in the Workshop on “Data Analytics and Machine Learning in Upgrading Energy Infrastructure and Sustainability”, Alliance University, Bangalore, 23-03-2024 to 23-03-2024
  13. Presented a paper titled “Smart Garbage System for Waste Management using ESP32 Microcontroller” at MRTM 2023, New Horizon College of Engineering, Bengaluru,, 22-09-2023 to 23-09-2023
  14. Presented a paper titled “Disaster Zone Alerting Application to Avert the Spread of Transmissible Diseases” at MRTM 2023, New Horizon College of Engineering, Bengaluru., 22-09-2023 to 23-09-2023
  15. Presented a paper titled “SMART Dustbin using ESP32” at ICETET 2023, Pandian Saraswathi Yadav Engineering College, Madurai, 28-04-2023 to 29-04-2023
  16. Presented a paper titled “Disaster Zone Alerting Application” at ICETET 2023, Pandian Saraswathi Yadav Engineering College, Madurai., 28-04-2023 to 29-04-2023
  17. Completed the Faculty Development Programme (FDP) on “Principles of Digital Signal Processing” at Kamaraj College of Engineering and Technology., 01-06-2015 to 07-06-2015
  18. Presented a paper titled “FPGA Implementation of an ECG Signal using GSM Network” at the Conference on VLSI Computation, Networking, Drives & System Design, Sethu Institute of Technology, Madurai,, 28-04-2014 to 28-04-2014
  19. Participated in the Workshop on “Analog Electronics” conducted by IIT Kharagpur, Thiagarajar College of Engineering, June 4–14, 2013, 04-06-2013 to 14-06-2013
  20. Presented a paper titled “Design of Low Power Reconfigurable MIMO OFDM Physical Layer using Single FFT Multiplexing” at ICDASDC 2012, KLN College of Information Technology, Madurai,, 21-12-2012 to 22-12-2012
  21. Presented a paper titled “An On-Chip AHB Tracer Design using Matrix-Based Lossless Compression Techniques” at ICDASDC 2012, KLN College of Information Technology, Madurai,, 21-12-2012 to 22-12-2012
  22. Participated in the Workshop on “8051 Microcontroller and PIC Controller”, Vickram College of Engineering., 05-12-2012 to 11-12-2012
  23. Participated in the National Seminar on “Recent Trends in Communication Technologies”, Velammal College of Engineering and Technology, Madurai., 25-08-2012 to 25-08-2012
  24. Participated in the Workshop on “System Integration Challenges and Solutions for Mixed Signal Design”, Thiagarajar College of Engineering., 04-06-2011 to 05-06-2011
  25. Participated in the Workshop on “Science and Technology Capacity Building for Industrial Needs”, St. Michael College of Engineering and Technology, December 2010., 11-12-2010 to 13-12-2010
  26. Participated in the Workshop on “Solid State Device Modelling”, Thiagarajar College of Engineering,Madurai, 26-11-2010 to 28-11-2010
  27. Participated in the Workshop on “Mobile Communication”, Vickram College of Engineering, Madurai., 30-11-2009 to 06-12-2009

 Seminar, Conference, Workshop Organised

  1. International Conference on Interdisciplinary Engineering and Sustainable Management Sciences, (ICIESMS 2013), Vickram College of Engineering, Madurai., 22-02-2013 to 23-02-2013
  2. DRDO Sponsored Workshop on Wavelet and Sparse Signal Representation, Vickram College of Engineering, Madurai, 28–29 Sept 2012, 28-09-2012 to 29-09-2012
  3. Workshop on EM Design of Microwave/RF Modules Using HFSS, Vickram College of Engineering, Madurai., 17-08-2012 to 17-08-2012

 Lectures Delivered

TOPIC DELIVERED AT PERIOD
Solid State of Device Modeling and Simulation Sethu Institute of Technology 07-11-2014 to 07-11-2014

 Membership

NAME OF SOCIETY DETAILS PERIOD
IEICE,Japan Member 05-02-2025 to 05-02-2026